1.
Bensikaddour EH, Boutte A. Motor speed control using a fault tolerance implementation on SRAM-based FPGA. Alger. J. Eng. Technol [Internet]. 2023 Dec. 28 [cited 2024 Dec. 4];8(2):302-8. Available from: https://journal.univ-eloued.dz/index.php/ajet/article/view/137